
#if 0
#include "stdio.h"
#include "stdlib.h"
#include "../gpio/gpio_i2c.h"
#endif

#define adv7441_I2C_ADDR_MAP 0x42

//#define nvp1114_ID 0x1b


REGTABLE adi7401_initial_data[] = 
{
	{0x00,0x00},
	{0x01,0xc8},
	{0x03,0x0c},
	{0x04,0x55},
	{0x05,0x00},

	{0x06,0x02},
	{0x0e,0x05},
	{0x15,0x40},
	{0x17,0x01},
	{0x27,0x58},
	{0x31,0x12},
	{0x39,0xc0},
	{0x3a,0x10},
	{0x3b,0x33},
	{0x3c,0x5b},
	{0x3d,0x33},

	{0x41,0x41},
	{0x4d,0xef},
	{0x67,0x03},

	{0x69,0x00},
	{0x6a,0x40},
	{0x6b,0xc0},
	{0x73,0x10},
	{0x77,0x3f},
	{0x78,0xff},
	{0x79,0xff},
	{0x7a,0xff},

	{0x7b,0x1e},
	{0x85,0x42},
	{0x86,0x02},
	{0x89,0x08},
	{0xbf,0x02},
	{0xc0,0x02},
	{0xc2,0x02},
	{0xc3,0x02},
	{0xc4,0x02},
	{0xc9,0x10},
	{0xcd,0x10},
	{0xce,0x10},

	{0xb5,0x03},
	{0xd0,0x46},
	{0xdc,0x7b},

	{0x6a,0x1a},
	{0xd4,0x01},
	{0xd6,0x3e},
	{0xe2,0x80},
	{0xe3,0x80},
	{0xe4,0x80},
	{0xe8,0x65},
	{0x87,0x60},
	{0x88,0x00},

	{0x51,0x24},
	{0xff,0xff}
};

REGTABLE adi7400_cvbs_data[]=
{
    	{0x00,0x0f}, //select input pin             ??                       
	{0x03,0x0c}, // Enable 24-bit 4:4:4 output on P29-P0 0c
	{0x17,0x41}, // Set CSFM to SH1                     
	{0x3A,0x16}, // Power Down ADC 1 & ADC 2            
	{0x3B,0x80}, // Enable externl Bias resistor        
	{0x69,0x00}, // Set SDM for CVBS on AIN11    ??       00
	{0x0E,0x85}, //                                     
    	{0x27,0xd8},//switch cb/cr
	{0x89,0x0D}, // Recommneded setting                 
	{0x8D,0x9B}, // Recommneded setting                 
	{0x8F,0x48}, // Recommneded setting                 
	{0xB5,0x8B}, // Recommneded setting                 
	{0xD4,0xFB}, // Recommneded setting                 
	{0xD6,0x6D}, // Recommneded setting                 
	{0xE2,0xAF}, // Recommneded setting                 
	{0xE3,0x00}, // Recommneded setting                 
	{0xE4,0xB5}, // Recommneded setting                 
	{0xE8,0xF3}, // Recommneded setting                 
	{0x0E,0x05}, // Recommneded setting  
    	{0xff,0xff}
};

REGTABLE adi7400_svideo_data[]=
{
   	{0x15,0x00}, 
	{0x3A,0x12}, // Power Down ADC 1 & ADC 2            
	{0x3B,0x80}, // Enable externl Bias resistor        
	{0x50,0x04}, 

	{0x69,0x02}, // Set SDM for CVBS on AIN11    ??       00
	{0xb3,0xfe}, 

	{0x0E,0x85}, //        
    	{0x27,0xd8},//switch cb/cr	
	{0x89,0x0D}, // Recommneded setting                 
	{0x8D,0x9B}, // Recommneded setting                 
	{0x8F,0x48}, // Recommneded setting                 
	{0xB5,0x8B}, // Recommneded setting                 
	{0xD4,0xFB}, // Recommneded setting                 
	{0xD6,0x6D}, // Recommneded setting                 
	{0xE2,0xAF}, // Recommneded setting                 
	{0xE3,0x00}, // Recommneded setting                 
	{0xE4,0xB5}, // Recommneded setting                 
	{0xE8,0xF3}, // Recommneded setting                 
	{0x0E,0x05}, // Recommneded setting 
   	{0xff,0xff}
};


REGTABLE adi7401_YPbPr576i_data[] = 
{
	{0x00,0x09}, //Set INSEL to YPrPb mode
	{0x01,0x88}, //Disable Hyncs PLL (Enable for SECAM)
	{0x03,0x15},
	{0x06,0x0f}, //set 720x576i mode
	{0x27,0xD8}, //Swap Cr & Cb
	{0x3B,0x80}, //Enable externl Bias resistor
	{0x0E,0x85}, //
	{0xD6,0x6D}, //Recommneded setting
	{0xE8,0xF3}, //Recommneded setting
	{0x0E,0x05}, //Recommneded setting
	{0x85,0x18},  // Turn off SSPD as SYNC is embedded on Y	
	{0xff,0xff}
};
REGTABLE adi7401_YPbPr480i_data[] = 
{
	{0x00,0x09},
	{0x01,0x88},
	{0x03,0x15},
	{0x06,0x0e},
	{0x27,0xD8},
	{0x3B,0x80},
	{0x0E,0x85},
	{0xD6,0x6D},
	{0xE8,0xF3},
	{0x0E,0x05},
	{0x85,0x18},  // Turn off SSPD as SYNC is embedded on Y
	{0xFF,0xff}
};

REGTABLE adi7401_YPbPr480P_data[] = 
{
	{0x00,0x09},
    	{0x03,0x15},
	{0x05,0x01},                                        
	{0x06,0x06},                              
	{0x3B,0x81}, //ADV7400_write(0x3B,0x80);  // Enable externl BIAS                                                  
	{0x3C,0x5C},  // Set up PLL_QPUMP[2:0]                                                
	{0x6B,0xC2},  // Set CPOP_SEL to a 4:2:2 16-bit output  0xc3                              
	{0x85,0x18},  // Turn off SSPD as SYNC is embedded on Y
	{0xff,0xff}
};

REGTABLE adi7401_YPbPr576P_data[] = 
{
	{0x00,0x09}, 
    	{0x03,0x15},
	{0x05,0x01},  // Setup up PRIM_MODE[1:0]                                              
	{0x06,0x07},  // Setup VID_STD[3:0] for 625P 2X1 mode                                 
	{0x3B,0x80}, //ADV7400_write(0x3B,0x80);  // Enable externl BIAS                                                  
	{0x3C,0x5C},  // Set up PLL_QPUMP[2:0]                                                
	{0x6B,0xC2},  // Set CPOP_SEL to a 4:2:2 16-bit output  0xc3                              
	{0x85,0x18},  // Turn off SSPD as SYNC is embedded on Y
	{0xff,0xff}
};

REGTABLE adi7401_YPbPr720P_data[] = 
{
	{0x00,0x09},
	{0x03,0x09},
	{0x05,0x01},   // Setup up PRIM_MODE[1:0]                                      
//	{0x06,0x0a},   // Setup VID_STD[3:0] for 525P 2X1 mode                         
	{0x06,0x0a},   // Setup VID_STD[3:0] for 720P!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!                         
	{0x0a,0x80},
	{0x0b,0x80},
	{0x3a,0x20},
	{0x3B,0x80},   //ADV7400_write(0x3B,0x80);   // Enable externl BIAS                                          
	{0x3C,0x5d},   // Set up PLL_QPUMP[2:0]                                        
//	{0x6B,0xc0},   // Set CPOP_SEL to a 4:2:2 16-bit output     0xc3                   
//	{0x6B,0xc1},   // Set CPOP_SEL to a 4:2:2 16-bit output     0xc1                   	
	{0x6B,0x83},   // Set CPOP_SEL to a 4:2:2 16-bit output 	0x81					

	{0x85,0x18},   // Turn off SSPD as SYNC is embedded on Y
    {0x0e,0x80},
    {0x58,0xed},
    {0x0e,0x00},
    {0xf4,0x95},
	{0xff,0xff}
};

/*
REGTABLE adi7401_YPbPr720P_data[] = 
{
	{0x00,0x09},
	{0x01,0xc8},
	{0x04,0x55},
	{0x05,0x01},
	{0x03,0x0c},
        {0x06,0x0a},
        {0x0e,0x05},    
        {0x17,0x01},    
        {0x27,0x58},                    
        {0x31,0x12},    
        {0x39,0xc0}, //?
        {0x3d,0x33},    
        {0x41,0x41},    
        {0x4d,0xef},    
        {0x67,0x03},    
        {0x69,0x00},    
        {0x6a,0x00},    
        {0x73,0x10},    
        {0x77,0x3f},    
        {0x78,0xff},    
        {0x79,0xff},    
        {0x7a,0xff},    
        {0x3a,0x20}, 
        {0x3b,0x80}, 
        {0x3c,0x5d}, 
        {0x6b,0xc0}, 
        {0x7b,0x1e}, 
        {0x71,0xc0}, 
        {0x72,0xc0}, 
        {0x87,0x60}, 
        {0x88,0x00}, 
        {0x85,0x18},
        {0x86,0x02},
        {0x89,0x08},
        {0xb5,0x03},
        {0xbf,0x02},
        {0xc0,0x02},
        {0xc2,0x02},
        {0xc3,0x02},
        {0xc4,0x02},
        {0xc9,0x10},
        {0xcd,0x10},
        {0xce,0x10},
        {0xd0,0x46},
        {0xd4,0x01},
        {0xd6,0x3e},
        {0xdc,0x7b},
        {0xe2,0x80},
        {0xe3,0x80},
        {0xe4,0x80},
        {0xe8,0x65},
        {0x0e,0x80}, 
        {0x58,0xed}, 
        {0x0e,0x00}
};        
        
*/        
        
        
REGTABLE adi7401_YPbPr1080i60_data[] = 
{       
   	{0x00,0x09}, 
	{0x05,0x01},   // Setup up PRIM_MODE[1:0]                                      
	{0x06,0x0c},   // Setup VID_STD[3:0] for 525P 2X1 mode                         
	{0x3a,0x20},
	{0x3B,0x80},   //ADV7400_write(0x3B,0x80);   // Enable externl BIAS                                          
	{0x3C,0x5b},   // Set up PLL_QPUMP[2:0]                                        
//	{0x6B,0xb0},   // Set CPOP_SEL to a 4:2:2 16-bit output     0xc3                   
	{0x6B,0xb3},   // Set CPOP_SEL to a 4:2:2 16-bit output     0xc3                   hl

	{0x71,0xc0}, 
	{0x72,0xc0}, 
	{0x85,0x18},   // Turn off SSPD as SYNC is embedded on Y
	{0x0e,0x80},
	{0x58,0xed},
	{0x0e,0x00},
	{0xff,0xff}
};

REGTABLE adi7401_YPbPr1080i50_data[] = 
{
	{0x05,0x01},   // Setup up PRIM_MODE[1:0]                                      
	{0x06,0x0c},   // Setup VID_STD[3:0] for 525P 2X1 mode                         
	{0x3a,0x30},
	{0x3B,0x80},   //ADV7400_write(0x3B,0x80);   // Enable externl BIAS                                          
	{0x3C,0x5d},   // Set up PLL_QPUMP[2:0]                                        
	{0x7b,0x1c}, 	
	{0x7c,0x53}, 
	{0x7d,0xb8},
	{0x7e,0x40},
	{0x87,0xea},
	{0x88,0x50},
	{0x8f,0x03},
	{0x90,0xc1},
	{0x85,0x18},   // Turn off SSPD as SYNC is embedded on Y
	{0xb3,0xfe},
	{0x0e,0x80},
	{0x58,0xed},
	{0x0e,0x00},
	{0xff,0xff}
};

